Strong Immunity to Drain-Induced Barrier Lowering in ALD-Grown Preferentially Oriented Indium Gallium Oxide Transistors.

Drain-induced barrier lowering (DIBL) is one of the most critical obstacles degrading the reliability of integrated circuits based on miniaturized transistors. Here, the effect of a crystallographic structure change in InGaO [indium gallium oxide (IGO)] thin-films on the DIBL was investigated. Preferentially oriented IGO (po-IGO) thin-film transistors (TFTs) have outstanding device performances with a field-effect mobility of 81.9 ± 1.3 cm2/(V s), a threshold voltage (VTH) of 0.07 ± 0.03 V, a subthreshold swing of 127 ± 2.0 mV/dec, and a current modulation ratio of (2.9 ± 0.2) × 1011. They also exhibit highly reliable electrical characteristics with a negligible VTH shift of +0.09 (-0.14) V under +2 (-2) MV/cm and 60 °C for 3600 s. More importantly, they reveal strong immunity to the DIBL of 17.5 ± 1.2 mV/V, while random polycrystalline In2O3 (rp-In2O3) and IGO (rp-IGO) TFTs show DIBL values of 197 ± 5.3 and 46.4 ± 1.2 mV/V, respectively. This is quite interesting because the rp- and po-IGO thin-films have the same cation composition ratio (In/Ga = 8:2). Given that the lateral diffusion of oxygen vacancies from the source/drain junction to the channel region via grain boundaries can reduce the effective length (Leff) of the oxide channel, this improved immunity could be attributed to suppressed lateral diffusion by preferential growth. In practice, the po-IGO TFTs have a longer Leff than the rp-In2O3 and -IGO TFTs even with the same patterned length. The effect of the crystallographic-structure-dependent Leff variation on the DIBL was corroborated by technological computer-aided design simulation. This work suggests that the atomic-layer-deposited po-IGO thin-film can be a promising candidate for next-generation electronic devices composed of the miniaturized oxide transistors.

Oxide and 2D TMD semiconductors for 3D DRAM cell transistors.

As the downscaling of conventional dynamic random-access memory (DRAM) has reached its limits, 3D DRAM has been proposed as a next-generation DRAM cell architecture. However, incorporating silicon into 3D DRAM technology faces various challenges in securing cost-effective high cell transistor performance. Therefore, many researchers are exploring the application of next-generation semiconductor materials, such as transition oxide semiconductors (OSs) and metal dichalcogenides (TMDs), to address these challenges and to realize 3D DRAM. This study provides an overview of the proposed structures for 3D DRAM, compares the characteristics of OSs and TMDs, and discusses the feasibility of employing the OSs and TMDs as the channel material for 3D DRAM. Furthermore, we review recent progress in 3D DRAM using the OSs, discussing their potential to overcome challenges in silicon-based approaches.

Tailoring Subthreshold Swing in A-IGZO Thin-Film Transistors for Amoled Displays: Impact of Conversion Mechanism on Peald Deposition Sequences.

Amorphous IGZO (a-IGZO) thin-film transistors (TFTs) are standard backplane electronics to power active-matrix organic light-emitting diode (AMOLED) televisions due to their high carrier mobility and negligible low leakage characteristics. Despite their advantages, limitations in color depth arise from a steep subthreshold swing (SS) (≤ 0.1 V/decade), necessitating costly external compensation for IGZO transistors. For mid-size mobile applications such as OLED tablets and notebooks, it is important to ensure controllable SS value (≥ 0.3 V/decade). In this study, a conversion mechanism during plasma-enhanced atomic layer deposition (PEALD) is proposed as a feasible route to control the SS. When a pulse of a diethylzinc (DEZn) precursor is exposed to the M2 O3 (M = In or Ga) surface layer, partial conversion of the underlying M2 O3 to ZnO is predicted on the basis of density function theory calculations. Notably, significant distinctions between In-Ga-Zn (Case I) and In-Zn-Ga (Case II) films are observed: Case II exhibits a lower growth rate and larger Ga/In ratio. Case II TFTs with a-IGZO (subcycle ratio of In:Ga:Zn = 3:1:1) show reasonable SS values (313 mV decade-1 ) and high mobility (µFE ) of 29.3 cm2 Vs-1 (Case I: 84 mV decade-1 and 33.4 cm2 Vs-1 ). The rationale for Case II's reasonable SS values is discussed, attributing it to the plausible formation of In-Zn defects, supported by technology computer-aided design (TCAD) simulations.

Comparative Study on Indium Precursors for Plasma-Enhanced Atomic Layer Deposition of In2O3 and Application to High-Performance Field-Effect Transistors.

Indium oxide (In2O3) is a transparent wide-bandgap semiconductor suitable for use in the back-end-of-line-compatible channel layers of heterogeneous monolithic three-dimensional (M3D) devices. The structural, chemical, and electrical properties of In2O3 films deposited by plasma-enhanced atomic layer deposition (PEALD) were examined using two different liquid-based precursors: (3-(dimethylamino)propyl)-dimethyl indium (DADI) and (N,N-dimethylbutylamine)trimethylindium (DATI). DATI-derived In2O3 films had higher growth per cycle (GPC), superior crystallinity, and low defect density compared with DADI-derived In2O3 films. Density functional theory calculations revealed that the structure of DATI can exhibit less steric hindrance compared with that of DADI, explaining the superior physical and electrical properties of the DATI-derived In2O3 film. DATI-derived In2O3 field-effect transistors (FETs) exhibited unprecedented performance, showcasing a high field-effect mobility of 115.8 cm2/(V s), a threshold voltage of -0.12 V, and a low subthreshold gate swing value of <70 mV/decade. These results were achieved by employing a 10-nm-thick HfO2 gate dielectric layer with an effective oxide thickness of 3.9 nm. Both DADI and DATI-derived In2O3 FET devices exhibited remarkable stability under bias stress conditions due to a high-quality In2O3 channel layer, good gate dielectric/channel interface matching, and a suitable passivation layer. These findings underscore the potential of ALD In2O3 films as promising materials for upper-layer channels in the next generation of M3D devices.

High-Performance Indium-Based Oxide Transistors with Multiple Channels Through Nanolaminate Structure Fabricated by Plasma-Enhanced Atomic Layer Deposition.

An atomic-layer-deposited oxide nanolaminate (NL) structure with 3 dyads where a single dyad consists of a 2-nm-thick confinement layer (CL) (In0.84Ga0.16O or In0.75Zn0.25O), and a barrier layer (BL) (Ga2O3) was designed to obtain superior electrical performance in thin-film transistors (TFTs). Within the oxide NL structure, multiple-channel formation was demonstrated by a pile-up of free charge carriers near CL/BL heterointerfaces in the form of the so-called quasi-two-dimensional electron gas (q2DEG), which leads to an outstanding carrier mobility (µFE) with band-like transport, steep gate swing (SS), and positive threshold voltage (VTH) behavior. Furthermore, reduced trap densities in oxide NL compared to those of conventional oxide single-layer TFTs ensures excellent stabilities. The optimized device with the In0.75Zn0.25O/Ga2O3 NL TFT showed remarkable electrical performance: µFE of 77.1 ± 0.67 cm2/(V s), VTH of 0.70 ± 0.25 V, SS of 100 ± 10 mV/dec, and ION/OFF of 8.9 × 109 with a low operation voltage range of ≤2 V and excellent stabilities (ΔVTH of +0.27, -0.55, and +0.04 V for PBTS, NBIS, and CCS, respectively). Based on in-depth analyses, the enhanced electrical performance is attributed to the presence of q2DEG formed at carefully engineered CL/BL heterointerfaces. Technological computer-aided design (TCAD) simulation was performed theoretically to confirm the formation of multiple channels in an oxide NL structure where the formation of a q2DEG was verified in the vicinity of CL/BL heterointerfaces. These results clearly demonstrate that introducing a heterojunction or NL structure concept into this atomic layer deposition (ALD)-derived oxide semiconductor system is a very effective strategy to boost the carrier-transporting properties and improve the photobias stability in the resulting TFTs.

High Mobility IZTO Thin-Film Transistors Based on Spinel Phase Formation at Low Temperature through a Catalytic Chemical Reaction.

In this paper, In0.22 Znδ Sn0.78- δ O1.89- δ (δ = 0.55) films with a single spinel phase are successfully grown at the low temperature of 300 °C through careful cation composition design and a catalytic chemical reaction. Thin-film transistors (TFTs) with amorphous In0 .22 Znδ Sn0.78- δ O1.89- δ (δ = 0.55) channel layers have a reasonable mobility of 41.0 cm2 V-1 s-1 due to the synergic intercalation of In and Sn ions. In contrast, TFTs with polycrystalline spinel In0 .22 Znδ Sn0.78- δ O1.89- δ (δ = 0.55) channel layers, achieved through a metal-induced crystallization at 300 °C, exhibit a remarkably high field-effect mobility of ≈83.2 cm2 V-1 s-1 and excellent stability against external gate bias stress, which is attributed to the uniform formation of the highly ordered spinel phase. The relationships between cation composition, microstructure, and performance for the In2 O3 -ZnO-SnO2 ternary component system are investigated rigorously to attain in-depth understanding of the roles of various crystalline phases, including spinel Zn2- y Sn1- y In2 y O4 (y = 0.45), bixbyite In2-2 x Znx Inx O4 (x = 0.4), rutile SnO2 , and a homologous compound of compound (ZnO)k (In2 O3 ) (k = 5). This work concludes that the cubic spinel phase of Zn2- y Sn1- y In2 y O4 (y = 0.45) film is a strong contender as a substitute for semiconducting polysilicon as a backplane channel ingredient for mobile active-matrix organic light-emitting diode displays.

Progress, Challenges, and Opportunities in Oxide Semiconductor Devices: A Key Building Block for Applications Ranging from Display Backplanes to 3D Integrated Semiconductor Chips.

As Si has faced physical limits on further scaling down, novel semiconducting materials such as 2D transition metal dichalcogenides and oxide semiconductors (OSs) have gained tremendous attention to continue the ever-demanding downscaling represented by Moore's law. Among them, OS is considered to be the most promising alternative material because it has intriguing features such as modest mobility, extremely low off-current, great uniformity, and low-temperature processibility with conventional complementary-metal-oxide-semiconductor-compatible methods. In practice, OS has successfully replaced hydrogenated amorphous Si in high-end liquid crystal display devices and has now become a standard backplane electronic for organic light-emitting diode displays despite the short time since their invention in 2004. For OS to be implemented in next-generation electronics such as back-end-of-line transistor applications in monolithic 3D integration beyond the display applications, however, there is still much room for further study, such as high mobility, immune short-channel effects, low electrical contact properties, etc. This study reviews the brief history of OS and recent progress in device applications from a material science and device physics point of view. Simultaneously, remaining challenges and opportunities in OS for use in next-generation electronics are discussed.

High-Performance Thin-Film Transistor with Atomic Layer Deposition (ALD)-Derived Indium-Gallium Oxide Channel for Back-End-of-Line Compatible Transistor Applications: Cation Combinatorial Approach.

In this paper, the feasibility of an indium-gallium oxide (In2(1-x)Ga2xOy) film through combinatorial atomic layer deposition (ALD) as an alternative channel material for back-end-of-line (BEOL) compatible transistor applications is studied. The microstructure of random polycrystalline In2Oy with a bixbyite structure was converted to the amorphous phase of In2(1-x)Ga2xOy film under thermal annealing at 400 °C when the fraction of Ga is ≥29 at. %. In contrast, the enhancement in the orientation of the (222) face and subsequent grain size was observed for the In1.60Ga0.40Oy film with the intermediate Ga fraction of 20 at. %. The suitability as a channel layer was tested on the 10-nm-thick HfO2 gate oxide where the natural length was designed to meet the requirement of short channel devices with a smaller gate length (<100 nm). The In1.60Ga0.40Oy thin-film transistors (TFTs) exhibited the high field-effect mobility (µFE) of 71.27 ± 0.98 cm2/(V s), low subthreshold gate swing (SS) of 74.4 mV/decade, threshold voltage (VTH) of -0.3 V, and ION/OFF ratio of >108, which would be applicable to the logic devices such as peripheral circuit of heterogeneous DRAM. The in-depth origin for this promising performance was discussed in detail, based on physical, optical, and chemical analysis.

High-Performance Broadband Phototransistor Based on TeOx/IGTO Heterojunctions.

Ultraviolet to infrared broadband spectral detection capability is a technological challenge for sensing materials being developed for high-performance photodetection. In this work, we stacked 9 nm-thick tellurium oxide (TeOx) and 8 nm-thick InGaSnO (IGTO) into a heterostructure at a low temperature of 150 °C. The superior photoelectric characteristics we achieved benefit from the intrinsic optical absorption range (300-1500 nm) of the hexagonal tellurium (Te) phase in the TeOx film, and photoinduced electrons are driven effectively by band alignment at the TeOx/IGTO interface under illumination. A photosensor based on our optimized heterostructure exhibited a remarkable detectivity of 1.6 × 1013 Jones, a responsivity of 84 A/W, and a photosensitivity of 1 × 105, along with an external quantum efficiency of 222% upon illumination by blue light (450 nm). Simultaneously, modest detection properties (responsivity: ∼31 A/W, detectivity: ∼6 × 1011 Jones) for infrared irradiation at 970 nm demonstrate that this heterostructure can be employed as a broadband phototransistor. Furthermore, its low-temperature processability suggests that our proposed concept might be used to design array optoelectronic devices for wide band detection with high sensitivity, flexibility, and stability.

Stretchable Polymer Gate Dielectric by Ultraviolet-Assisted Hafnium Oxide Doping at Low Temperature for High-Performance Indium Gallium Tin Oxide Transistors.

This paper reports the fabrication of indium gallium tin oxide (IGTO) thin-film transistors (TFTs) with ultraviolet (UV)-treated PVP- co-PMMA-based hybrid gate insulators at an extremely low temperature (≤150 °C). Synergetic hafnia loading and UV treatment were used to tailor the mechanical softness and hydroxyl fraction in the polymer dielectric film. The UV-treated hybrid dielectric film had a low hydroxyl concentration, a smoother surface, and a denser packing nature, which can be explained by the high ionicity of hafnium oxide and photon-assisted improvement in the cohesion between organic and inorganic materials. Suitability of the UV-treated hybrid dielectric film as a gate insulator was evaluated by fabricating bottom gate TFTs with sputtered IGTO films as a channel layer, which showed high carrier mobility at a low temperature. The resulting IGTO TFTs with a UV-treated hybrid gate insulator exhibited a remarkable high field-effect mobility of 25.9 cm2/(V s), a threshold voltage of -0.2 V, a subthreshold gate swing of 0.4 V/decade, and an ION/OFF ratio of >107 even at a low annealing temperature of 150 °C. The fabricated IGTO TFTs with the UV-treated hybrid dielectric film on the plastic substrate were shown to withstand the 100 times mechanical bending stress even under an extremely small curvature radius of 1 mm due to the intrinsic stretchability of the hybrid dielectric film.